1. Field of the Invention
This invention relates to a semiconductor device comprising a field effect device having a gate structure provided within a trench.
In particular, this invention relates to a semiconductor device comprising a semiconductor body comprising a field effect device wherein the semiconductor body has source and drain regions spaced apart by a body region and both meeting a surface of the semiconductor body, the field effect device having a gate structure provided within a trench for controlling a conduction channel in a conduction channel accommodation portion of the body region extending along at least the sidewalks of the trench and between the source and drain regions.
2. Description of the Prior Art
U.S. Pat. No. 4,835,584 describes such a trench transistor in which the source, gate and drain are formed within a trench in a semiconductor substrate. In this trench transistor, the gate width (where, as is understood in the art, the gate width is the dimension perpendicular to the flow of majority charge carriers through a conduction channel in the conduction channel accommodation portion and the gate length is the dimension parallel to the flow of majority charge carriers through the conduction channel) is determined by the depth of the trench and can be increased substantially without increasing the surface area occupied by the transistor, thereby enabling the device to have a good conduction channel width to length ratio and so a low on-resistance (Rdson) and good current handling capabilities or gain, without occupying an overly large area of semiconductor. However, the trench transistor proposed in U.S. Pat. No. 4,835,584 is not capable of withstanding high voltages between the source and drain regions when the device is non-conducting.
It is an aim of the present invention to provide a lateral field effect device having a trench gate structure which, in addition to having a low on-resistance, also has good reverse voltage withstanding characteristics.
In one aspect, the present invention provides a semiconductor device as set out in claim 1.
In another aspect, the present invention provides a lateral field effect semiconductor device wherein a gate structure for controlling a conduction channel between source and drain regions extends in a trench which is elongate in the direction between the source and drain regions so that a conduction channel accommodation portion is defined in a body region at least adjacent the elongate sidewalks of the trench, wherein the gate structure comprises an insulated gate structure, the trench extends beyond the body region into a drain drift region and towards the drain region with a dielectric layer on the walls of the portion of the trench in the drain drift region being is thicker than the gate dielectric layer and the gate conductive region being formed integrally with a field plate extending within the trench over the thicker dielectric layer towards the drain region. In an embodiment, a plurality of such insulated gate structures are provided. In an embodiment, the field effect device is symmetrical about the drain region.
A semiconductor device embodying the invention enables a lateral trench field effect device to be provided that has good current carrying capabilities and low on-resistance whilst also enabling relatively high voltages between the source and drain region to be withstood when the field effect device is non-conducting.
Other advantageous technical features in accordance with the present invention are set out in the appended dependent claims.